Xilinx Vivado (Webpack) 2017.3 Installation
In my Digital System Design module in QMUL EECS, we used the NI DSDB board for lab exercises. The board is very powerful and can be programmed via Xilinx Vivado or NI Labview. In this blog of reminder, I am going to outline the installation process for Xilinx Vivado version 2017.3 which gives the best compatibilty for the DSDB board.
Keil uVision in Virtual Machine
This is a note to myself and my students about installing Keil uVision via Virtual Machines.
Quartus Lite 18.1 Installation
In one of my modules, I used the Terasic DE10-Lite FPGA board for labs. This handy, little board can be programmed easily via a USB-A cable as it has the Altera USB-Blaster programmer already. My students found it very useful to verify their digital designs on board.
Building an extensive synchronous up/down counter with enable
This is a popular exercise that I’d love to discuss with my students. The design is very practical and it reveals the basic idea how to generalise the ripple adder concept to create an iterative circuit for a synchronous counter. The requirement of having up or down control also challenges the understanding of the 2’s complement arithmetic which is usually introduced earlier.
Building a digital circuit for addition
First of all, digital circuits work with 0’s and 1’s (i.e. bits). Numbers are therefore represented in binary before they can be added in the digital circuits that we are going to design. For now, let’s assume numbers are non-negative \(X = 0, 1, 2, \ldots\) so that a simple binary conversion suffices, for instance:
A Trick for Subtraction
The first series of my blogs is to explain how we build a digital circuit for addition and subtraction – the most fundamental arithmetic operations. I will start with some theory of the maths and then discuss the circuitry. The discussion is a background for us to understand the signed multiplication that I wrote earlier on.
Signed Multiplication – Part 1
Through the years my students repeatedly confuse with the theory of the signed multiplication. They do not understand why a correction is needed when the mutliplier (i.e. \(B\) in \(A\times B\)) is negative. This is of course complicated by the fact that negative numbers are expressed or represented by its 2’s complement so that only addition is required through the procedure.
My new blog
This is the first post in this new blog of mine. After teaching engineering of digital systems large and small for a decade, I feel that there are much to share with the others. While we are still in the pandemic, blogging seems to be the best way to share and communicate with other each.